/*
 * Copyright : (C) 2024 Termony Technology, Inc. All Rights Reserved.
 */

#ifndef RK_PMU2_IOC_HW_H
#define RK_PMU2_IOC_HW_H

#ifdef __cplusplus
extern "C"
{
#endif

/** @name Register Map
 *
 * Register offsets for the PMU1_IOC.
 */
#define RK_PMU2_IOC_GPIO0B_IOMUX_SEL_H_OFFSET   0x0000U /* GPIO0B IOMUX Select High bits */
#define RK_PMU2_IOC_GPIO0C_IOMUX_SEL_L_OFFSET   0x0004U /* GPIO0C IOMUX Select Low bits */
#define RK_PMU2_IOC_GPIO0C_IOMUX_SEL_H_OFFSET   0x0008U /* GPIO0C IOMUX Select High bits */
#define RK_PMU2_IOC_GPIO0D_IOMUX_SEL_L_OFFSET   0x000CU /* GPIO0D IOMUX Select Low bits */
#define RK_PMU2_IOC_GPIO0D_IOMUX_SEL_H_OFFSET   0x0010U /* GPIO0D IOMUX Select High bits */
#define RK_PMU2_IOC_GPIO0B_DS_H_OFFSET          0x0014U /* GPIO0B Driver Strength Control High bits */
#define RK_PMU2_IOC_GPIO0C_DS_L_OFFSET          0x0018U /* GPIO0C Driver Strength Control Low bits */
#define RK_PMU2_IOC_GPIO0C_DS_H_OFFSET          0x001CU /* GPIO0C Driver Strength Control High bits */
#define RK_PMU2_IOC_GPIO0D_DS_L_OFFSET          0x0020U /* GPIO0D Driver Strength Control Low bits */
#define RK_PMU2_IOC_GPIO0D_DS_H_OFFSET          0x0024U /* GPIO0D Driver Strength Control High bits */
#define RK_PMU2_IOC_GPIO0B_P_OFFSET             0x0028U /* GPIO0B Pull-up/down Control */
#define RK_PMU2_IOC_GPIO0C_P_OFFSET             0x002CU /* GPIO0C Pull-up/down Control */
#define RK_PMU2_IOC_GPIO0D_P_OFFSET             0x0030U /* GPIO0D Pull-up/down Control */
#define RK_PMU2_IOC_GPIO0B_IE_OFFSET            0x0034U /* GPIO0B Input Enable Control */
#define RK_PMU2_IOC_GPIO0C_IE_OFFSET            0x0030U /* GPIO0C Input Enable Control */
#define RK_PMU2_IOC_GPIO0D_IE_OFFSET            0x003CU /* GPIO0D Input Enable Control */
#define RK_PMU2_IOC_GPIO0B_SMT_OFFSET           0x0040U /* GPIO0B Schmitt Trigger Control */
#define RK_PMU2_IOC_GPIO0C_SMT_OFFSET           0x0044U /* GPIO0C Schmitt Trigger Control */
#define RK_PMU2_IOC_GPIO0D_SMT_OFFSET           0x0048U /* GPIO0D Schmitt Trigger Control */
#define RK_PMU2_IOC_GPIO0B_PDIS_OFFSET          0x004CU /* GPIO0B Auto Pull-up/down disable Control */
#define RK_PMU2_IOC_GPIO0C_PDIS_OFFSET          0x0050U /* GPIO0C Auto Pull-up/down disable Control */
#define RK_PMU2_IOC_GPIO0D_PDIS_OFFSET          0x0054U /* GPIO0D Auto Pull-up/down disable Control */

#ifdef __cplusplus
}
#endif

#endif /* RK_PMU2_IOC_HW_H */